Measurement Approach to Evaluation of Ultra-Low-Voltage Amplifier ASICs
DOI:
https://doi.org/10.2478/msr-2024-0002Keywords:
integrated circuit testing, measurement board, input offset voltage, Common-Mode Rejection Ratio (CMRR), Power Supply Rejection Ratio (PSRR), Fully Differential Difference Amplifier (FDDA)Abstract
This article presents measurement circuitry and a test board developed for experimental evaluation of prototype chip samples of Fully Differential Difference Amplifier (FDDA). The device under test (DUT) is an ultra low-voltage, high performance integrated FDDA designed and fabricated in 130 nm CMOS technology. The measurement circuits were implemented on the test board along with the fabricated FDDA chip to evaluate its main parameters and properties. In this work, we focus on evaluation of the following parameters: the input offset voltage, the common-mode rejection ratio, and the power supply rejection ratio. The test board was developed and verified. The test board error was measured to be 38.73 mV. The offset voltage of the FDDA was −0.66 mV. The measured FDDA gain and gain bandwidth are 48 dB and 550 kHz, respectively. Besides the measurement board, a graphical user interface was developed to simplify the control of device under test during measurements.
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Copyright (c) 2024 Slovak Academy of Sciences - Institute of Measurement Science
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